SC 2019 On Demand

As in the previous four years, this workshop will bring together application experts, software developers, and hardware engineers, both from industry and academia, to share experiences and best practices to leverage the practical application of reconfigurable logic to Scientific Computing, Machine/Deep Learning, and “Big Data” applications. In particular, the workshop will focus on sharing experiences and techniques for accelerating applications and/or improving energy efficiency with FPGAs using OpenCL, OpenMP, OpenACC, SYCL, C, C++, and other high-level design flows, which enable and improve cross-platform functional and performance portability while also improving productivity. Particular emphasis is given to cross-platform comparisons and combinations that foster a better understanding within the industry and research community on what are the best mappings of applications to a diverse range of hardware architectures that are available today (e.g., FPGA, GPU, Many-cores and hybrid devices, ASICs), and on how to most effectively achieve cross-platform compatibility. 

The ever-increasing heterogeneity in supercomputing applications has given rise to complex compute node architectures offering multiple, heterogeneous levels of massive parallelism. Exploiting the maximum available parallelism out of such systems necessitates sophisticated programming approaches that can provide scalable as well as portable solutions without compromising on performance. Software abstraction-based programming models, such as OpenMP and OpenACC, have been raising the abstraction of code to reduce the burden on the programmer while improving productivity.

Recent architectural trends indicate a heavy reliance of future exascale machines on accelerators for performance. Toward this end, the workshop will highlight the improvements over state-of-art through the accepted papers and prompt discussion through keynotes and panel. The workshop aims to showcase all aspects of heterogeneous systems discussing innovative high-level language features, lessons learned while using directives to migrate scientific legacy code to parallel processors, compilation and runtime scheduling techniques among others. 

The ability for applications to achieve both portability and high performance across computer architectures remains an open challenge. There is a clear need to develop ways of managing the complexity that arises from system diversity that balance the need for performant specializations with the economy of appropriate and efficient abstractions. The purpose of this workshop is to provide an opportunity for attendees to share ideas, practical experiences, and methodologies for tackling the challenge of achieving performance portability and developer productivity across current and future homogeneous and heterogeneous computer architectures.