An NVIDIA compiler engineer last week laid out the company's plans for implementing OpenACC 3.3 offloading support within the LLVM Clang compiler.
The in-development GCC 14 compiler has added support for the MIPS16e2 processor ISA.
MIPS16e2 is an extension of the MIPS16e instruction set and compatible with the MIPS32 and MIPS64 instruction sets. The MIPS16e2 ASE adds eight general purpose registers and several special purpose registers and defines new instructions for helping to increase code density.

The GCC Steering Committee has now adopted a Code of Conduct "CoC" for this open-source compiler project. Passionate compiler developers and other GCC stakeholders are encouraged to remind themselves to be civil in their discussions and follow other recommendations to foster their community.
Stay up-to-date on the latest updates: This month's edition covers the Open Hackathon Mentor Program, a highlight from a team at the recent UK National Hackathon, upcoming Open Hackathons and Bootcamps, and more!!
In this issue: